Integrated circuits (ICs) are made up of electronic components linked together by conductive connections to form one or more functional circuits. ICs are typically formed in a piece of silicon called a chip or die. Silicon dice can be formed in a wafer that is a sheet of silicon with a surface that is subject to a series of fabrication steps to form a pattern of identical ICs. The ICs are separated from each other by a repeating pattern of scribe lines, also called saw lines, in the surface of the wafer that serve as boundaries between the dice. One IC is formed on each die. At a stage in a fabrication process the dice are diced (cut apart) from the wafer along the scribe lines and each die is bonded to a substrate to form an IC package.
A substrate is a relatively flat and rigid structure that provides mechanical support for the die in the IC package, transmits signals to and from the IC, and can also transfer heat that is generated during the operation of the IC. The substrate may also be called a carrier. The substrate includes conductive leads connected to respective bonding pads on the die so that the IC may exchange signals with other circuits in the IC package and circuits connected to the IC package. Additional elements such as resistors and capacitors that are not readily included in the IC may be attached to the top or bottom of the IC package. The IC package may be applied to a circuit board assembly that comprises systems of interconnected IC packages to form an electronic device such as a computer or a cellular phone.
One method of bonding a die to a substrate in an IC package is called a flip-chip bonding method. One version of the flip-chip bonding method is formally known as the controlled collapse chip connection or C4 method. In the flip-chip bonding method, solder bumps are placed on bonding pads on the dice while they are connected together in the wafer. The wafer is then diced to separate the dice. Each die is then turned over, or flipped, and aligned with a corresponding pattern of bonding pads or solder bumps on a substrate. A second reflow procedure is carried out to join the bumps to form a series of solder columns between the die and the substrate. The solder columns serve as conductive connections or leads between an IC in the die and the substrate through which I/O signals are transmitted, and power is delivered.
Todays wide range of market segmentation for the microprocessor industry has created challenges in inventory management. These challenges could be solved by having technology and manufacturing capability flexible enough to allow classification of a product in the last manufacturing process step.
Attempts to solve this problem have been made, but have created more complications in the manufacturing process. Presently changes in product classification are accomplished by using external components such as an external fuse (see FIG. 1, designated Prior Art, showing a flip chip pin grid array, or FCPGA type package using external caps/fuse). In this approach, external fuses are programmed to short certain circuits and thus change the product classification. This approach has a number of disadvantages, including the high cost of the extra components, and the need for extra “real estate” on the package to place the additional components. This leads to a larger package body size and thus a higher cost. Further, this approach presents complications in the assembly process and more designs and line items for suppliers and manufacturers to manage.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for technology and manufacturing capability which are flexible enough to allow the classification of the product in the last manufacturing process step.
The above mentioned problems with integrated circuit packaging and other problems are addressed by the present invention and will be understood by reading and studying the following specification.